500x Speed-up of C++ Tools for Infineon

Problem

Routines for compaction or merging of shapes in transistor layout tools can be O(N²) computationally expensive, which can lead to hours of waiting time for users.

Contribution

• optimization flags improvement: 5x - 20x faster
• look-up table bottleneck: 3x - 10x faster
• multi-threading on 16 threads: up to 10x faster
• legacy code debugging, testing and improvements

Outcomes

• compaction: 500x faster
• merging: 130x faster
• user waiting time cut from 8+ hours to 5 minutes